Apply For DFT Design For Testability

• SISOC Semiconductor Technologies
• Office Location
• Full Time

Experience: 2 - 2 years required

Pay:

Salary Information not included

Type: Full Time

Location: Karnataka

Skills: scan insertion, Mbist, LBIST, ATPG using FastscanTestKompress DFTCompilerDFTMaxDFTAdvisorTetraMaxPattern, Simulation withwithout timing annotation debugging