DFT Design For Testability SISOC Semiconductor Technologies
SISOC Semiconductor Technologies
Office Location
Full Time
Experience: 2 - 2 years required
Pay:
Salary Information not included
Type: Full Time
Location: Karnataka
Skills: scan insertion, Mbist, LBIST, ATPG using FastscanTestKompress DFTCompilerDFTMaxDFTAdvisorTetraMaxPattern, Simulation withwithout timing annotation debugging
About SISOC Semiconductor Technologies
Job Description
Experience : 2+ years in DFT Skills: Scan insertion LBIST, MBIST ATPG using Fastscan/TestKompress /DFTCompiler/DFTMax/DFTAdvisor/TetraMaxPattern Simulation with/without timing annotation & debugging,