Apply For VLSI Mentor / Guest Faculty

• Spandsons Horizon Engineering
• Office Location
• Full Time

Experience: 4 - 4 years required

Pay:

Salary Information not included

Type: Full Time

Location: Salem

Skills: Verilog HDL, SystemVerilog, UVM, ASIC design, FPGA Design, LTSPICE, Synopsys Design Compiler, Primetime, VCS, Verdi, Low power design, Digital Design Verification, FPGABased Digital System Design, RISCV Architecture, Xilinx Vivado, EDA Playground, ModelSimVivado, ICC2