Apply For Technical Lead (FPGA Developer)
HyrEzy Talent Solutions LLP
Office Location
Full Time
Experience: 5 - 5 years required
Pay:
Salary Information not included
Type: Full Time
Location: Haryana
Skills: VHDL, Verilog, SystemVerilog, FFT, Signal Generator, GNU Radio, Agile, USRP N310X310, FPGA architecture, Vivado HLS, Xilinx IP, Vivado Block Diagram, RFNoC Block, USRP Hardware Driver UHD, FIR, Fosphor, FPGA debugging, HWSW integration, XILINX ZYNQ 71xxplkINTEX7, customer communication skills
Jobs Form