Apply For SMTS/Principal FPGA Design Engineer

• Marvylogic
• Office Location
• Full Time

Experience: 10 - 10 years required

Pay:

Salary Information not included

Type: Full Time

Location: Karnataka

Skills: FPGA Design, Debugging, Synplify, Debugging tools, PERL scripting, tcl scripting, Database Management, synthesis, DFT, Design optimization, Xilinx Ultrascale, Virtex7, Xilinx Vivado, Coregen, TimingIO constraints, High speed clock domains, Thirdparty IP integration, PCIe controller, Serdes PCS, FMC daughtercards, HighSpeed CablesConnectors, RTL tools, RTL simulation, ASIC RTL, ASIC product life cycle, validation process