Apply For SMTS/Principal ASIC Design Engineer

• Marvylogic
• Office Location
• Full Time

Experience: 10 - 10 years required

Pay:

Salary Information not included

Type: Full Time

Location: Karnataka

Skills: Verilog, System Verilog, PCIe, Linux, Windows, Lint, CDC, DFT, LEC, UPF, ASIC RTL design, PHY SerDes, PCIe protocol analyzers, DMA engines, Microarchitecture specification, FPGA netlist releases, ASIC product life cycle