Apply For RTL Design Engineer / Digital Lead Engineer - IP Or SOC

• Marvylogic
• Office Location
• Full Time

Experience: 4 - 4 years required

Pay:

Salary Information not included

Type: Full Time

Location: Karnataka

Skills: Verilog, VHDL, Spyglass, PTPX, LEC, Perl, ARM based processor SOC, digital VLSI design, Multiprocessor, cache designs, ARM AMBA protocols, cache coherency protocols, 0in, DCCompiler, Prime time, PowerArtist, TCL language