Apply For FPGA Senior Design Engineer

• Procsys
• Office Location
• Full Time

Experience: 3 - 3 years required

Pay:

Salary Information not included

Type: Full Time

Location: Karnataka

Skills: RTL Coding, Verilog, VHDL, FPGA, AMD, Altera, Lattice, Microchip, ModelSim, PCIe, Gigabit Ethernet, DDR3, SPI, UART, I2C, Python, adc, DACs, ChipScope, System Verilog, DSO, Logic Analyzer, Spectrum Analyzer, microprocessors, Microcontrollers, TCPIP, Networking protocols, quality process, Configuration management, Xilinx, Intel, SPI42, SFI42, UTOPIA, POS PHY, USB23, Aurora, Tcl, SignalTap, Network Analyzers, traffic generators, L2L3 Switching, Hardware schematics