Apply For ASIC Physical Design Engineer

• Ceremorphic
• Office Location
• Full Time

Experience: 5 - 5 years required

Pay:

Salary Information not included

Type: Full Time

Location: Hyderabad

Skills: floorplanning, Placement, timing closure, Routing, Extraction, SCAN, BIST, ATPG, Power Planning, Logic, clock tree synthesis, Physical Verification DRC LVS, Crosstalk Analysis, EMIR, TCLPerl programming, double patterning process nodes, Cadence RTLtoGDSII flow