Explore Job Openings at Synopsys Inc
Employees - 100+, Positions - 30+, Salary - 0 - 0 , Industry Type - IT - Software
Synopsys Inc Overview
Welcome to the career portal of Synopsys Inc on MYTAT! We're thrilled that you're considering joining our team. Below are the latest job openings available at our company. We are constantly growing, so be sure to check back regularly for new opportunities.
Synopsys Inc Current Job Openings
Here are the latest job opportunities available at Synopsys Inc:
Senior Staff Emulation Engineer
Synopsys Inc
Office Location
Full Time
- PCIe
- DDR
- IP Verification
- emulation
- acceleration
- PHY
- HardwareAssisted Verification
- IP interfaces
- ZeBu
- HAPS
- EP platforms
- Controller
- Test Plans
- advanced protocols
Salary Information not included
Staff/ Sr Staff/ Principal R&D Engineer
- Synopsys Inc
- Office Location
- Full Time
- Data structures
- algorithms
- CC Coding
- EDACAD tool development
Salary Information not included
Principal Analog Design/CAD Solutions Engineer
- Synopsys Inc
- Office Location
- Full Time
- Analog Design
- Software Development
- Parasitic Extraction
- Mixed Signal Design
- Memory Design
- Custom Compiler
- Custom Layout Flows
- simulation environments
- Custom Placement
- Routing
Salary Information not included
Sr. R&D Engineer
- Synopsys Inc
- Office Location
- Full Time
- Machine Assembly
- algorithms
- Data structures
- DFT
- programming software for operating systems
- control languages
- software capabilities
- CC Coding
- CAD tool development
Salary Information not included
Staff/Sr Staff/Principal Emulation Engineers
- Synopsys Inc
- Office Location
- Full Time
- PCIe
- DDR
- emulation
- Verification
- PHY
- protocols
- IP interfaces
- ZeBu
- HAPS
- EP platforms
- Controller
- methodology ownership
- Test Plans
Salary Information not included
Senior Staff Engineer TCAD
- Synopsys Inc
- Office Location
- Full Time
- Technology
- TCAD
- Chip Design
- Verification
- Process Modeling
- presentation skills
- Communication skills
- collaboration
- Consulting
- Product Development
- Project Management
- Modeling
- Calibration
- Semiconductor physics
- IP integration
- Semiconductor Devices
- Process Technologies
- Semiconductor manufacturing processes
- Experimental TestCharacterization Data Analysis
- Python Scripting
Salary Information not included
Lead GUI Engineer
- Synopsys Inc
- Office Location
- Full Time
- scientific computing
- solid state physics
- Chemistry
- Python
- C
- Web technologies
- layouting
- Visual Design
- user interface development
- fullstack web development
- UI Frameworks
- react
- Vue
- web backend development
- serverclient based applications
- atomic scale modelling
- UI programming
Salary Information not included
ASIC Physical design engineer
- Synopsys Inc
- Office Location
- Full Time
- Electrical engineering
- DRC
- LVS
- STA
- PV
- Mentoring
- collaboration
- ASIC Physical design
- Timingclean Designs
- Scripting with Tcl
- Scripting with Perl
- IR Closure
- Place
- Route
Salary Information not included
Topography Simulation Methodology Engineer
- Synopsys Inc
- Office Location
- Full Time
- Technology
- Electrical engineering
- Physics
- Process Modeling
- Consulting
- RD
- Sales
- marketing
- Device Design
- Silicon
- Semiconductor physics
- Materials Sciences
- Semiconductor Devices
- Process Technologies
- Semiconductor manufacturing processes
- TCAD Calibration
- Customer projects
- TCAD Simulation
- Python Scripting
- Problemsolving
Salary Information not included
ASIC DIGITAL DESIGN ENGINEER
- Synopsys Inc
- Office Location
- Full Time
- RTL design
- Verification
- IP
- SOC
- PCIe
- DDR
- UFS
- USB
- AMBA
- DFT
- UPF
- Low power design
- Gate level verification
Salary Information not included
Sr Supervisor Analog Design
- Synopsys Inc
- Office Location
- Full Time
- signal integrity
- Power Integrity
- CMOS processes
- CMOS circuit design
- Analogmixed signal circuitry
- ASIC design flow
- JEDEC requirements
- DDR Timing
- SDRAM functionality
- ESD concepts
Salary Information not included
PDK Development Apprenticeship
- Synopsys Inc
- Office Location
- Full Time
- QA
- Regression Testing
- UNIX
- Linux
- scripting languages
- Perl
- Python
- Debugging
- Communication skills
- Process Design Kits
- PDKs
- Circuit Designs
- CMOS fundamentals
- ASIC design flow
- VLSI Design Methodologies
- Tcl
- Engineering problem solving
Salary Information not included
Software Engineer, Staff
- Synopsys Inc
- Office Location
- Full Time
- Python
- algorithms
- Data structures
- Windows OS
- EDA tools
- CC
- UnixLinux
- schematiclayout design
- English communication
- Problemsolving
- OOP programming
Salary Information not included
Senior/ Senior Staff Pre Silicon Emulation Engineer
- Synopsys Inc
- Office Location
- Full Time
- SoC verification
- SoC architecture
- emulation
- FPGA
- RTL verification
- Debugging
- USB
- PCIe
- UFS
- System on Chip designs
- Virtual Environments
- Synopsys advanced technology
- Semiconductor design
- High speed protocols
- LPDDR technology
Salary Information not included
Senior R&D Engineer
- Synopsys Inc
- Office Location
- Full Time
- MOSFET
- Quality analysis
- Verilog
- HSPICE
- Analytical skills
- Communication skills
- Finfet
- Standard Cell Modeling
- PrimeLib
- PrimeSim
- FineSim
- ProblemSolving Skills
Salary Information not included
Sr Staff Engineer - Synthesis/low power expert
- Synopsys Inc
- Office Location
- Full Time
- synthesis
- timing closure
- power optimization
- RTL
- DFT
- TCM
- PTPX
- Perl
- Python
- constraints management
- LDRC
- VCLP
- Tcl
Salary Information not included
ASIC Digital Design, Architect
- Synopsys Inc
- Office Location
- Full Time
- VMM
- OVM
- UVM
- UFS
- AMBA
- AXI
- SD
- Ethernet
- DDR
- PCIe
- USB
- Verilog
- Perl
- Python
- architecting verification environments
- HVL System Verilog
- functional coverage
- MIPII3C
- Unipro
- eMMC
- Tcl
- VIP development
Salary Information not included
Senior/Lead ASIC/IP Verification Engineers (PCIe)
- Synopsys Inc
- Office Location
- Full Time
- System Verilog
- Verilog
- object oriented programming
- VMM
- OVM
- UVM
- PCIe protocol
Salary Information not included
ASIC Digital Design, Sr. Architect
- Synopsys Inc
- Office Location
- Full Time
- UFS
- AMBA
- Ethernet
- DDR
- PCIe
- USB
- Verilog
- Perl
- Python
- architecting verification environments
- HVL System Verilog
- functional coverage
- VMMOVMUVM
- MIPII3C
- Unipro
- SDeMMC
- Tcl
- VIP development
Salary Information not included
R&D Engineer
- Synopsys Inc
- Office Location
- Full Time
- Embedded systems
- UNIX
- Linux
- Windows
- Matlab
- Python
- CC programming
- Verbal
- written communication
Salary Information not included
Sr Staff Engineer
- Synopsys Inc
- Office Location
- Full Time
- DDR
- PCIe
- AMBA
- SD
- Ethernet
- USB
- MIPI
- UVM
- VMM
- OVM
- SV
- Perl
- Python
- eMMC
- CC
- Tcl
Salary Information not included
Verification Methodology Architect
- Synopsys Inc
- Office Location
- Full Time
- Simulation
- Debugging
- Formal Verification
- FPGA Prototyping
- emulation
- Scripting
- Automation
- Technical leadership
- Verification Engineer
- verification methodologies
- Static verification
- CAD flows
- IP design
- CrossFunctional Collaboration
Salary Information not included
Architect (EDA tool development)
- Synopsys Inc
- Office Location
- Full Time
- C
- Software Development
- Python
- Linux
- Data structures
- algorithms
- GUI
- Communication
- Negotiation
- Machine Learning
- EDA tool development
- Custom Design
- layout creation
- Tcl
- IC fabrication
- CMOS circuit design
- EDA flows
Salary Information not included
Principal Analog Solutions Engineer
- Synopsys Inc
- Office Location
- Full Time
- Analog Design
- Scripting
- Programming
- Python
- Perl
- Custom Compiler
- Custom Design
- Analog design creation
- Tcl
- SKILL
Salary Information not included
Software Engineer
- Synopsys Inc
- Office Location
- Full Time
- scientific computing
- computational geometry
- Software Engineering Practices
- Data structures
- algorithms
- C software development
- Semiconductor technologies
- 3D technology modeling software
- physicsrelated modeling algorithms
- numerical recipes
- numerical performance optimization
Salary Information not included
ASIC Digital Design Engr, Sr II
- Synopsys Inc
- Office Location
- Full Time
- Verification
- RTL design
- Code Coverage
- Verilog
- scripting languages
- UVM
- VMM
- OVM
- Debugging
- Problem Solving
- Communication skills
- HVL coding
- functional coverage
- IP design
- VIP development
- ASIC Digital Design
Salary Information not included
GUI Engineer
- Synopsys Inc
- Office Location
- Full Time
- scientific computing
- solid state physics
- Chemistry
- Python
- C
- Web technologies
- layouting
- Visual Design
- user interface development
- fullstack web development
- UI Frameworks
- react
- Vue
- web backend development
- serverclient based applications
- atomic scale modelling
- UI programming
Salary Information not included
Staff RTL/ FPGA Design Engineer
- Synopsys Inc
- Office Location
- Full Time
- Design
- Validation
- PCIe
- USB
- protocols
- Testing
- Programming Languages
- SystemVerilog
- Verilog
- Perl
- Python
- emulation
- Communication
- collaboration
- FPGAbased solutions
- CXL
- Hardware Assisted Verification
- highspeed protocols
- Tcl
- Prototyping Platforms
- ZeBu
- HAPS
- Problemsolving
Salary Information not included
Asic Verification Engineer
- Synopsys Inc
- Office Location
- Full Time
- System Verilog
- Verilog
- object oriented programming
- VMM
- OVM
- UVM
- PCIe
- USB
- MIPI
- HDMI
- Ethernet
- DDR
- UCIe
- CXL
- Unipro
- LPDDR
- HBM
Salary Information not included
Sr Staff - Physical Design - Synthesis/low power expert
- Synopsys Inc
- Office Location
- Full Time
- synthesis
- timing closure
- power optimization
- RTL
- DFT
- TCM
- PTPX
- Perl
- Python
- constraints management
- LDRC
- VCLP
- Tcl